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| PJUSB208-PJUSB208R Low Capacitance Diode Array This diode array is configured to protect up to four data transmission lines acting as a line terminator, minimizing overshoot and undershoot conditions due to bus impedance as well as protect against over-voltage events as electrostatic discharges. SOT23-6L SPECIFICATION FEATURES Maximum Capacitance of 3.0pF at 0Vdc 1MHz Line-to-Ground Peak Inverse voltage of 40V per diode Maximum Leakage Current of 1.0A @ VR Industry Standard SMT Package SOT23-6L IEC61000-4-2 (Level 4) +/-8kV (Contact) +/-15kV (Air) 100% Tin Matte finish (LEAD-FREE PRODUCT) Two pin 1 orientations available I/O3 I/O2 1 6 I/O3 REF2 2 5 REF1 I/O1 3 4 I/O4 PJUSB208 1 6 I/O2 APPLICATIONS REF1 2 5 REF2 USB 2.0 and Firewire Port Protection I/O4 3 4 I/O1 LAN/WLAN Access Point terminals Video Signal line protection PJUSB208R TVS PJSUB208 PJUSB208R Marking Code 208 316 MAXIMUM RATINGS Tj = 25C Unless otherwise noted Rating Repetitive Peak Inverse Voltage Continuous Reverse Voltage Peak Pulse Current (8/20s Waveform) Average Rectified Forward Current, Per Diode Power Dissipation, Tj = 85C, IF = 200mA, Per Diode Operating Junction Temperature Range Storage Temperature Range Soldering Temperature, t max = 10 s Symbol V RRM VR I PP I F(AV) PD Tj Tstg TL Value 40 40 24 50 100 -55 to +150 -55 to +150 260 Units V V A mA mW C C C 6/19/2006 Page 1 www.panjit.com PJUSB208 ELECTRICAL CHARACTERISTICS Parameter Repetitive Peak Inverse Voltage Breakdown Voltage Forward Voltage (8/20s Pulse) Reverse Leakage Current Symbol V RRM V BR VF IR I BR = 10A I PP = 1A I PP = 10A V R = 40V 0Vdc Bias, f =1 MHz Between I/O pins and REF2 (Ground) 0Vdc Bias, f =1 MHz Between I/O pins 2.0 50 2.0 5.0 1.0 3.0 Tj = 25C unless otherwise noted Conditions Min Typ Max 40 Units V V V V A pF Off-State Junction Capacitance CJ pF 8/20s Surge Pulse Waveform 110 100 90 80 70 60 50 40 30 20 10 0 0 Forward Voltage vs Ipp 8/20s Surge 25 Percent of Ipp 50% of Ipp @ 20s 20 Ipp, Amps 15 10 5 0 Rise time 10-90% - 8s 5 10 15 time, sec 20 25 30 1 2 3 4 5 6 7 8 9 10 11 12 Forward Voltage, V 6/19/2006 Page 2 www.panjit.com PJUSB208 PACKAGE DIMENSIONS AND SUGGESTED PAD LAYOUT (c) Copyright PanJit International, Inc 2006 The information presented in this document is believed to be accurate and reliable. The specifications and information herein are subject to change without notice. Pan Jit makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose. Pan Jit products are not authorized for use in life support devices or systems. Pan Jit does not convey any license under its patent rights or rights of others. 6/19/2006 Page 3 www.panjit.com |
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